1. Field of the Invention:
The present invention relates to the field of high speed digital circuits, in particular, high speed digital circuits based on CMOS technology. More specifically, the present invention relates to a method and apparatus for resynchronizing data slices with variable skews in a digital system, such as a data instrumentation system.
2. Background:
In a number of digital applications, such as data instrumentation, it is often necessary for a high speed circuit to resynchronize the data inputs it receives because of its sensitivity to data skews due to its high operating speed. These circuits include but not limited to those operating at a speed of 66 MHZ or higher. A particular example is when a stream of data is being decomposed and sent in the form of multiple interrelated streams of data slices from a number of remote high speed circuits to an acquisition high speed circuit. More specifically, when each stream of data slices is sent with its own clock to allow the data acquisition high speed circuit to capture the data from the interrelated streams of data slices. Since the different streams may encounter different analog delays in the system as they travel from the remote high speed circuits to the data acquisition high speed circuit, the data acquisition high speed circuit must be able to properly capture the data from corresponding data slices in the interrelated streams.
Thus, it is desirable to be able to resynchronize the data slices with variable skews. As will be disclosed, the present invention provides such a method and apparatus, which advantageously achieves the desirable results. As will be obvious from the descriptions to follow, the present invention has particular application to high speed data instrumentation systems.